Vi riporto una interessante spiegazione degli aspetti collaterali dell LLC presa da un altro forum:
Loadline calibration does not ADD voltage and it never has added voltage. The rumor that it added voltage started back when Super I/O chips voltage sensors would be affected by power plane impedance, which would cause the sensor to report that the voltage at load was higher than what you set in bios. Back when people were raging hard at Gigabyte during their "Boot loop" P67/Z68 chipset days, someone took a multimeter to the board and noticed that the board wasn't actually adding voltage at all, even on the highest LLC level. Rather the vdroop circuit was being turned down to 0 mOhms loadline.
All loadline calibration is is a mOhms rating of vdroop. The lowest setting (Standard, Normal, etc) uses the intel defaults for that SKU, which is either 1.6 mOhms or 2.10 mOhms, depending of # of cores (8 core CFL=1.6 mOhms). Then as you increase the LLC, the mOhms level gets lower, until the flattest LLC, which is 0 mOhms of loadline (no vdroop).
The danger of using higher levels of LLC are transient spikes and dips in voltage, which happen due to both the VRM's being stressed (voltage signal instability/oscillations) and transient response, which gets worse the flatter the LLC is. Transient response is how fast the mosfets can react to a load change in the CPU and adjust the amount of current that it supplies. The problem is, with a 0 mOhm loadline, if the CPU is requesting a high load, then the load stops and the CPU is then idle, the power mosfets cannot react fast enough to turn off the current going to the processor. Let's take 1.30v for an example.
You run prime95 with a 0 mOhm loadline (highest LLC). Then you stop the test at 1.30v, and the CPU was pulling 200 watts (drawing 160 amps). The mosfets are supplying the current the CPU needs. Suddenly the CPU no longer needs that current as the test is stopped. However the CPU is MUCH MUCH faster than the VRM's. The VRM's simply can't shut off the current as fast as the CPU stops executing instructions. So now, the CPU is idle but the VRM's are still supplying 160 amps to the CPU until they can discharge and turn off the load, which takes some microseconds.
That power has to go somewhere. Since the CPU can't burn it by executing instructions, the voltage goes *up* past 1.3v, usually up to the level of the "missing" vdroop (based on current), so probably around 200mv (!) That's because that power has to go somewhere. So since the CPU wasnt using it, it goes into the voltage. Then it drops back down. That is a 'transient spike' and is worst case scenario (heavy load to no load).
Transient dips are similar. CPU goes from no load to heavy load. But the VRM's can't supply the current fast enough instantly. So the CPU voltage -drops- since the current isn't being supplied until the VRM's can respond. So the dip at worst case is going to be massive.
Now prime95 isnt a continuous load either. The load constantly changes in each thread repeatedly even though all the cores are at 100% load, and the VRM's have to respond to this too, which creates constant smaller transient spikes and dips as well, which you will see as voltage oscillation. You need an oscilloscope to see this as they happen far too quickly (microseconds). Onboard sensors and even true RMS multimeters simply don't react fast enough to see these spikes and dips.
Anyway here is what is going on with loadline calibration exactly:
https://www.overclock.net/forum/6-i...0-vrm-discussion-thread-398.html#post27860326